DEMETER (DEep SubMicron System-on-Chip (SoC) for Harsh Environment applicaTions using EuRopean Technologies)

DEMETER will be providing innovative platforms to produce and demonstrate Systems on Chip that are currently not available on the market. The solutions satisfy severe European requirements like the utilization in harsh environment for the FPGA. DEMETER is a European project aiming at answering the needs of the European industry providing:

  • A platform to prepare the development of a large radiation hardened FPGAs which is not available on the market today.
  • A second platform to bring the means to European avionic actors to evaluate the multi core concept regarding aeronautic certification. In addition, the demonstrator will include an embedded FPGA which will bring a high flexibility to implement dedicated logic like interfaces or hardware acceleration engines tightly coupled with the cores.

Objectives

  • To bring unique innovative solutions by integrating Dynamic Partial Reconfiguration, protection through native code, directly on chip and in software and packaging technology in a European pilot line platform delivering circuits free of export control in the whole European Union.
  • To offer a high performance computing platform.

 For more information visit project website.

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The work has been performed in the project DEMETER, co-funded by grants from Poland, France, Greece, Italy and the ENIAC Joint Undertaking.